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power-off protection 5 v, +12 v, quad spst switches with 5 on resistance ADG4612/adg4613 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010 analog devices, inc. all rights reserved. features power-off protection switch guaranteed off with no power supplies present inputs are high impedance with no power switch turns off when input > v dd + v t overvoltage protection up to 16 v pss robust negative signal capability passes signals down to ?5.5 v 6.1 maximum on resistance 1.4 on-resistance flatness 3 v to 5.5 v dual supply 3 v to 12 v single supply 3 v logic compatible inputs rail-to-rail operation 16-lead tssop and 16-lead 3 mm 3 mm lfcsp applications hot swap applications data acquisition systems battery-powered systems automatic test equipment communication systems relay replacement general description the ADG4612/adg4613 contain four independent single- pole/single-throw (spst) switches. the ADG4612 switches are turned on with logic 1 on the appropriate control input. the adg4613 has two switches with digital control logic similar to that of the ADG4612; the logic is inverted on the other two switches. each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. the adg4613 exhibits break-before-make switching action for use in multiplexer applications. when no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance inputs, ensuring that no current flows, which can damage the switch or downstream circuitry. this is very useful in applications where analog signals may be present at the switch inputs before power is applied or where the user has no control over the power supply sequence. in the off condition, signal levels up to 16 v are blocked. also, when the analog input signal levels exceed v dd by v t , the switch turns off. functional block diagram switches shown for a logic 1 input. in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 ADG4612 in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg4613 09005-001 figure 1. the low on resistance of these switches make them ideal solutions for data acquisition and gain switching applications where low on resistance and distortion is critical. the on- resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. product highlights 1. power-off protection on both s and d pins. 2. pss robustness. 3. overvoltage protection up to 16 v. 4. 5.2 on resistance. 5. 16-lead tssop and 3 mm 3 mm lfcsp packages.
ADG4612/adg4613 rev. 0 | page 2 of 24 table of contents features .............................................................................................. 1 applications....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 product highlights ........................................................................... 1 specifications..................................................................................... 3 5 v dual supply............................................................................ 3 12 v single supply........................................................................ 5 5 v single supply.......................................................................... 7 continuous current per channel, sx or dx............................. 8 power supply operation.............................................................. 8 absolute maximum ratings............................................................ 9 thermal resistance .......................................................................9 esd caution...................................................................................9 pin configurations and function descriptions ......................... 10 typical performance characteristics ........................................... 11 test circuits..................................................................................... 14 terminology .................................................................................... 16 theory of operation ...................................................................... 17 bipolar operation and single-supply operation................... 18 applications information .............................................................. 19 outline dimensions ....................................................................... 21 ordering guide .......................................................................... 22 revision history 10/10revision 0: initial version
ADG4612/adg4613 rev. 0 | page 3 of 24 specifications 5 v dual supply v dd = +5 v 10%, v ss = ?5 v 10%, gnd = 0 v, unless otherwise noted. table 1. parameter 25c ?40c to +85c unit test conditions/comments analog switch analog signal range (normal mode) ?5.5 v to v dd v v dd to v ss = 16 v maximum on resistance (r on ) 5.2 typ v s = 4.5 v, i s = ?10 ma; see figure 22 6.1 7.6 max v dd = +4.5 v, v ss = ?4.5 v on-resistance match between channels (?r on ) 0.05 typ v s = 4.5 v, i s = ?10 ma 0.15 0.18 max on-resistance flatness (r flat (on) ) 1.4 typ v s = 4.5 v, i s = ?10 ma 1.75 2.2 max leakage currents (normal mode) v dd = +5.5 v, v ss = ?5.5 v source off leakage, i s (off ) 5 na typ v s = 4.5 v, v d = ? 4.5 v; see figure 23 10 300 na max drain off leakage, i d (off ) 5 na typ v s = 4.5 v, v d = ? 4.5 v; see figure 23 10 300 na max channel on leakage, i d (on), i s (on) 10 na typ v s = v d = 4.5 v; see figure 24 16 700 na max leakage currents (isolation mode) source off leakage, i s (off ) 0.03 a typ v dd = 0 v or floating, v ss = 0 v or floating, gnd = 0 v 0.1 2.5 a max v s = ?5.5 v, v d = +10.5 v; or v s = +10.5 v, v d = ?5.5 v; see figure 23 8 a typ v dd = +5.5 v, v ss = ?5.5 v or 0 v 22 30 amax v s = ?5.5 v, v d = +10.5 v; or v s = +10.5 v, v d = ?5.5 v; see figure 23 drain off leakage, i d (off ) 0.03 a typ v dd = 0 v or floating, v ss = 0 v or floating, gnd = 0 v 0.1 2.5 a max v s = ?5.5 v, v d = +10.5 v; or v s = +10.5 v, v d = ?5.5 v; see figure 23 8 a typ v dd = +5.5 v, v ss = ?5.5 v or 0 v 22 30 a max v s = ?5.5 v, v d = +10.5 v; or v s = +10.5 v, v d = ?5.5 v; see figure 23 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current, i inl 0.015 a typ v in = v gnd 0.1 0.15 a max input current, i inh 13 a typ v in = v dd 16 18 a max logic pull-down resistance, r pd 400 k typ digital input capacitance, c in 4 pf typ dynamic characteristics 1 t on 73 ns typ r l = 300 , c l = 35 pf 125 149 ns max v s = 3 v; see figure 25 t off 100 ns typ r l = 300 , c l = 35 pf 125 149 ns max v s = 3 v; see figure 25
ADG4612/adg4613 rev. 0 | page 4 of 24 parameter 25c ?40c to +85c unit test conditions/comments break-before-make time delay, t d 20 ns typ r l = 50 , c l = 35 pf (adg4613 only) 3 ns min v s1 = v s2 = 3 v; see figure 26 fault response time 295 ns typ v s = 2 v to 8 v, r l = 300 , c l = 35 pf fault recovery time 1.2 s typ v s = 2 v to 8 v, r l = 300 , c l = 35 pf threshold voltage, v t 1.8 v typ charge injection 225 pc typ v s = 0 v, r s = 0 , c l = 1 nf; see figure 27 off isolation ?54 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 28 channel-to-channel crosstalk ?71 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 total harmonic distortion + noise, thd + n 0.13 % typ r l = 110 , 6 v p-p, f = 20 hz to 20 khz; see figure 31 insertion loss ?0.5 db typ r l = 50 , c l = 5 pf; f = 1 mhz; see figure 30 ?3 db bandwidth 293 mhz typ r l = 50 , c l = 5 pf; see figure 30 c s (off ) 13 pf typ v s = 0 v, f = 1 mhz c d (off ) 13 pf typ v s = 0 v, f = 1 mhz c d (on), c s (on) 50 pf typ v s = 0 v, f = 1 mhz power requirements normal mode digital inputs = 0 v or v dd i dd 90 a typ v dd = +5.5 v, v ss = ?5.5 v 140 165 a max i ss 27 a typ v dd = +5.5 v, v ss = ?5.5 v 50 58 a max isolation mode v dd = +5.5 v, v ss = ?5.5 v or floating i dd 90 a typ digital inputs = 0 v or 5.5 v 140 165 a max v s = ?5.5 v or +10.5 v v dd = 0 v or floating, v ss = ?5.5 v i ss 0.1 a typ digital inputs = 0 v or 5.5 v 0.2 6 a max v s = ?5.5 v or +10.5 v 1 guaranteed by design; not subject to production test.
ADG4612/adg4613 rev. 0 | page 5 of 24 12 v single supply v dd = 12 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 2. parameter 25c ?40c to +85c unit test conditions/comments analog switch analog signal range ?5.5 v to v dd v v dd to v ss = 16 v maximum on-resistance (r on ) 4.5 typ v s = 0 v to +10 v, i s = ?10 ma; see figure 22 5.1 6.4 max v dd = 10.8 v, v ss = 0 v on-resistance match between channels (?r on ) 0.05 typ v s = 0 v to +10 v, i s = ?10 ma 0.15 0.18 max on-resistance flatness (r flat (on) ) 1 typ v s = 0 v to +10 v, i s = ?10 ma 1.25 1.6 max leakage currents normal mode v dd = 13.2 v, v ss = 0 v source off leakage, i s (off ) 3 na typ v s = 1 v/10 v, v d = 10 v/1 v; see figure 23 10 200 na max drain off leakage, i d (off ) 3 na typ v s = 1 v/10 v, v d = 10 v/1 v; see figure 23 10 200 na max channel on leakage, i d (on), i s (on) 7 na typ v s = v d = 1 v or 10 v; figure 24 11 300 na max isolation mode source off leakage, i s (off ) 0.05 a typ v dd = 0 v or floating, v ss = 0 v or floating, gnd = 0 v 0.3 3 a max v s = 1 v/16 v, v d = 16 v/1 v; see figure 23 10 a typ v dd = 13.2 v, v ss = 0 v, v s = 16 v/1 v, v d = 1 v/16 v; see figure 23 28 38 a max drain off leakage, i d (off ) 0.05 a typ v dd = 0 v or floating, v ss = 0 v or floating, gnd = 0 v v s = 1 v/16 v, v d = 16 v/1 v; see figure 23 0.3 3 a max 10 a typ v dd = 13.2 v, v ss = 0 v v s = 16 v/1 v, v d = 1 v/16 v; see figure 23 28 38 a max digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current, i inl 0.015 a typ v in = v gnd 0.1 0.15 a max input current, i inh 13 a typ v in = 5 v 16 18 a max input current, i inh 34 a typ v in = v dd 40 42 a max logic pull-down resistance, r pd 400 k typ digital input capacitance, c in 4 pf typ dynamic characteristics 1 t on 46 ns typ r l = 300 , c l = 35 pf 73 90 ns max v s = 8 v; see figure 25 t off 70 ns typ r l = 300 , c l = 35 pf 91 103 ns max v s = 8 v; see figure 25
ADG4612/adg4613 rev. 0 | page 6 of 24 parameter 25c ?40c to +85c unit test conditions/comments break-before-make time delay, t d 17 ns typ r l = 50 , c l = 35 pf (adg4613 only) 11 ns min v s1 = v s2 = 8 v; see figure 26 fault response time 250 ns typ v s = 9 v to 15 v, r l = 300 , c l = 35 pf fault recovery time 1.4 s typ v s = 9 v to 15 v, r l = 300 , c l = 35 pf threshold voltage, v t 1.8 v typ charge injection 292 pc typ v s = 6 v, r s = 0 , c l = 1 nf; see figure 27 off isolation ?56 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 28 channel-to-channel crosstalk ?74 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 total harmonic distortion + noise, thd + n 0.26 % typ r l = 110 , 6 v p-p, f = 20 hz to 20 khz; see figure 31 insertion loss ?0.27 db typ r l = 50 , c l = 5 pf; f = 1 mhz; see figure 30 ?3 db bandwidth 250 mhz typ r l = 50 , c l = 5 pf; see figure 30 c s (off ) 11.5 pf typ v s = 0 v, f = 1 mhz c d (off ) 11.5 pf typ v s = 0 v, f = 1 mhz c d (on), c s (on) 48 pf typ v s = 0 v, f = 1 mhz power requirements normal mode v dd = 13.2 v, v ss = 0 v i dd 90 a typ digital inputs = 0 v or v dd 140 165 a max i dd 600 a typ digital inputs = 5 v 660 900 a max isolation mode v dd = 13.2 v, v ss = 0 v or floating i dd 90 a typ v s = 16 v or 1 v 140 165 a max digital inputs = 0 v or v dd 1 guaranteed by design, not subject to production test.
ADG4612/adg4613 rev. 0 | page 7 of 24 5 v single supply v dd = 5 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 3. parameter 25c ?40c to +85c unit test conditions/comments analog switch analog signal range ?5.5 v to v dd v v dd to v ss = 16 v maximum on-resistance (r on ) 12.5 typ v s = 0 v to +4.5 v, i s = ?10 ma; see figure 22 14.7 17 max v dd = 4.5 v, v ss = 0 v, on-resistance match between channels (?r on ) 0.15 typ v s = 0 v to +4.5 v, i s = ?10 ma 0.5 0.6 max on-resistance flatness (r flat (on) ) 6.2 typ v s = 0 v to +4.5 v, i s = ?10 ma 8 8.9 max leakage currents normal mode v dd = 5.5 v, v ss = 0 v source off leakage, i s (off ) 0.8 na typ v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 23 3 80 na max drain off leakage, i d (off ) 0.8 na typ v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 23 3 80 na max channel on leakage, i d (on), i s (on) 2 na typ v s = v d = 1 v or 4.5 v; see figure 24 5 120 na max isolation mode source off leakage, i s (off ) 0.05 a typ v dd = 0 v or floating, v ss = 0 v or floating, gnd = 0 v 0.15 3 a max v s = 1 v/16 v, v d = 16 v/1 v; see figure 23 10 a typ v dd = 5.5 v, v ss = 0 v 28 38 a max v s = 1 v/16 v, v d = 16 v/1 v ; figure 23 drain off leakage, i d (off ) 0.05 a typ v dd = 0 v or floating, v ss = 0 v or floating, gnd = 0 v 0.15 3 a max v s = 1 v/16 v, v d = 16 v/1 v; see figure 23 10 a typ v dd = 5.5 v, v ss = 0 v 28 38 a max v s = 1 v/16 v, v d = 16 v/1 v ; see figure 23 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current, i inl 0.015 a typ v in = v gnd 0.1 0.15 a max input current, i inh 13 a typ v in = v dd 16 18 a max logic pull-down resistance, r pd 400 k typ digital input capacitance, c in 4 pf typ dynamic characteristics 1 t on 116 ns typ r l = 300 , c l = 35 pf 190 226 ns max v s = 3 v; see figure 25 t off 87 ns typ r l = 300 , c l = 35 pf 120 136 ns max v s = 3 v; see figure 25 break-before-make time delay, t d 70 ns typ r l = 50 , c l = 35 pf (adg4613 only) 32 ns min v s1 = v s2 = 3 v; see figure 26 fault response time 240 ns typ v s = 2 v to 8 v, r l = 300 , c l = 35 pf fault recovery time 1.2 s typ v s = 2 v to 8 v, r l = 300 , c l = 35 pf threshold voltage, v t 1.8 v typ charge injection 75 pc typ v s = 0 v, r s = 0 , c l = 1 nf; see figure 27 off isolation ?54 db typ r l = 50 , c l = 5 pf, f = 100 khz; see figure 28
ADG4612/adg4613 rev. 0 | page 8 of 24 parameter 25c ?40c to +85c unit test conditions/comments channel-to-channel crosstalk ?71 db typ r l = 50 , c l = 5 pf, f = 100 khz; see figure 29 total harmonic distortion + noise, thd + n 0.85 % typ r l = 110 , f = 20 hz to 20 khz, v s = 3.5 v p-p; see figure 31 insertion loss ?0.5 db typ r l = 50 , c l = 5 pf; f = 1 mhz; see figure 30 ?3 db bandwidth 293 mhz typ r l = 50 , c l = 5 pf; see figure 30 c s (off ) 14 pf typ v s = 0 v, f = 1 mhz c d (off ) 14 pf typ v s = 0 v, f = 1 mhz c d (on), c s (on) 50 pf typ v s = 0 v, f = 1 mhz power requirements normal mode v dd = 5.5 v, v ss = 0 v i dd 90 a typ digital inputs = 0 v or v dd 140 165 a max isolation mode v dd = 5.5 v, v ss = 0 v or floating i dd 90 a typ digital inputs = 0 v or 5.5 v 140 165 a max v s = 1 v/16 v, v d = 16 v/1 v 1 guaranteed by design, not subject to production test. continuous current per channel, sx or dx table 4. parameter 25c 85c unit continuous current, sx or dx v dd = +5 v, v ss = ?5 v tssop ( ja = 112c/w) 109 52 ma maximum lfcsp ( ja = 48.7c/w) 160 83 ma maximum v dd = 12 v, v ss = 0 v tssop ( ja = 112c/w) 113 56 ma maximum lfcsp ( ja = 48.7c/w) 175 87 ma maximum v dd = 5 v, v ss = 0 v tssop ( ja = 112c/w) 78 39 ma maximum lfcsp ( ja = 48.7c/w) 118 56 ma maximum power supply operation temperature range is ?40c to +105c, unless otherwise noted. table 5. parameter min max unit comments power supply v dd to v ss 16 v gnd = 0 v v dd 2.7 16 v gnd = 0 v v ss ?5.5 0 v gnd = 0 v dual supply v ss /v dd ?5.5 +10.5 v v dd to v ss = 16 v, gnd = 0 v single supply v dd 0 16 v v dd to v ss = 16 v, gnd = 0 v, v ss = 0 v analog signal range, v d , v s normal mode ?5.5 v dd v v dd to v ss = 16 v maximum isolation mode ?5.5 +16 v most negative (v s ,v d , or v ss ) to most positive (v s ,v d , inx, or v dd ) = 16 v maximum
ADG4612/adg4613 rev. 0 | page 9 of 24 absolute maximum ratings t a = 25c, unless otherwise noted. table 6. parameter rating v dd to v ss 18 v v dd to gnd ?0.3 v to +18 v v ss to gnd +0.3 v to ?7 v analog inputs; v s to v d 18 v analog inputs; v d , v s ?7 v to +18 v most negative (v s ,v d or v ss ) to most positive (v s ,v d , inx, or v dd ) 18 v digital inputs, inx gnd ? 0.3 v to +18 v peak current, sx or dx 350 ma (pulsed at 1 ms, 10% duty cycle max) continuous current, sx or dx 1 data + 15% operating temperature range ?40c to +105c storage temperature range ?65c to +150c junction temperature 150c reflow soldering peak temperature, pb-free 260 (0/?5)c 1 see . table 4 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. thermal resistance ja is specified for a 4-layer board and, where applicable, with the exposed pad soldered to the board. table 7. thermal resistance package type ja unit 16-lead tssop 112 c/w 16-lead lfcsp 48.7 c/w esd caution
ADG4612/adg4613 rev. 0 | page 10 of 24 pin configurations a nd function descriptions top view (not to scale) 1 2 3 4 5 6 7 8 ADG4612/ adg4613 nc = no connect 16 15 14 13 12 11 10 9 d1 s1 v ss d4 s4 gnd in1 d2 s2 v dd d3 in4 in3 s3 nc in2 09005-002 figure 2. tssop pin configuration pin 1 indicator notes 1. exposed pad tied to substrate, gnd. 2. nc = no connect. 1 s1 2v ss 3 gnd 4 s4 11 v dd 12 s2 10 nc 9s3 5 d4 6 in4 7 in 3 8 d3 15 in1 16 d1 14 in2 13 d2 top view (not to scale) ADG4612/ adg4613 09005-003 figure 3. lfcsp pin configuration table 8. pin function descriptions pin no. tssop lfcsp mnemonic description 1 15 in1 logic control input 1. this pin has an internal 400 k pull-down resistor to gnd. 2 16 d1 drain terminal 1. can be an input or output. 3 1 s1 source terminal 1. ca n be an input or output. 4 2 v ss most negative power supply potential. 5 3 gnd ground (0 v) reference. 6 4 s4 source terminal 4. ca n be an input or output. 7 5 d4 drain terminal 4. can be an input or output. 8 6 in4 logic control input 4. this pin has an internal 400 k pull-down resistor to gnd. 9 7 in3 logic control input 3. this pin has an internal 400 k pull-down resistor to gnd. 10 8 d3 drain terminal 3. can be an input or output. 11 9 s3 source terminal 3. ca n be an input or output. 12 10 nc no connection. 13 11 v dd most positive power supply potential. 14 12 s2 source terminal 2. can be an input or output. 15 13 d2 drain terminal 2. can be an input or output. 16 14 in2 logic control input 2. this pin has an internal 400 k pull-down resistor to gnd. n/a 0 epad the exposed pad is connected to the substrate gnd. for best heat dissipation, it is recommended that this pad be connected to gnd. if heat dissipation is not a concern, it is possible to leave the pad floating. connecting the exposed pad to v ss (if v ss is not equal to gnd) can cause current to flow and can damage the part. table 9. ADG4612 truth table ADG4612 inx switch condition 1 on 0 off table 10. adg4613 truth table adg4613 inx s1, s4 s2, s3 0 off on 1 on off
ADG4612/adg4613 rev. 0 | page 11 of 24 typical performance characteristics 0 1 2 3 4 5 6 7 8 9 ?6 ?4 ?2 0 2 4 6 on resistance ( ? ) v s or v d voltage (v) v dd = +3v v ss = ?3v v dd = +4.5v v ss = ?4.5v v dd = +5v v ss = ?5v v dd = +5.5v v ss = ?5.5v 09005-004 t a = 25c figure 4. on resistance as a function of v s , v d (dual supply) 0 2 4 6 8 10 12 14 ?6?4?20246810121416 on resistance ( ? ) v s or v d voltage (v) v dd = 10.8v v ss = 0v v dd = 12v v ss = 0v v dd = 13.2v v ss = 0v v dd = 16v v ss = 0v v dd = 4.5v v ss = 0v v dd = 5v v ss = 0v v dd = 5.5v v ss = 0v 09005-005 t a = 25c figure 5. on resistance as a function of v s , v d (single supply) 0 1 2 3 4 5 6 7 ?6 ?4 ?2 0 2 4 on resistance ( ? ) v s or v d voltage (v) 09005-006 v dd = +5v v ss = ?5v t a = +105c t a = +85c t a = ?40c t a = +25c figure 6. on resistance as a function of v s , v d for different temperatures, 5 v dual supply 09005-007 0 2 4 6 8 10 12 ?6 ?5 ?4 ?3 ?2 ?1 0 1 2 3 on resistance ( ? ) v dd = +3v v ss = ?3v v s or v d voltage (v) t a = +105c t a = +85c t a = ?40c t a = +25c figure 7. on resistance as a function of v s , v d for different temperatures, 3 v dual supply 09005-008 0 1 2 3 4 5 6 ?4 ?2 0 2 4 6 8 10 12 on resistance ( ? ) v dd = +12v v ss = 0v v s or v d voltage (v) t a = +105c t a = +85c t a = ?40c t a = +25c figure 8. on resistance as a function of v s , v d for different temperatures, 12 v single supply 0 2 4 6 8 10 12 14 ?6 ?4 ?2 0 2 4 on resistance ( ? ) v s or v d voltage (v) 09005-009 v dd = +5v v ss = 0v t a = +105c t a = +85c t a = ?40c t a = +25c figure 9. on resistance as a function of v s , v d for different temperatures, 5 v single supply
ADG4612/adg4613 rev. 0 | page 12 of 24 0 20406080100 leakage current (na) temperature (c) 100 0 ?100 ?300 ?200 ?500 ?400 ?600 ?700 v dd = +5v v ss = ?5v v bias = 1v/4.5v i d , i s (on) ? , ? i s (off) ? , + i d (off) +, ? i d , (off) ? , + i s (off) +, ? i d , i s (on) +, + 09005-010 figure 10. leakage currents as a function of temperature, 5 v dual supply 0 20406080100 leakage current (na) temperature (c) 100 0 ?100 ?300 ?200 ?500 ?400 v dd = +3v v ss = ?3v v bias = 1v/2v i d , i s (on) ? , ? i s (off) ? , + i d (off) +, ? i d , (off) ? , + i s (off) +, ? i d , i s (on) +, + 09005-011 figure 11. leakage currents as a function of temperature, 3 v dual supply 0 20406080100 leakage current (na) temperature (c) 200 300 100 ?100 0 ?300 ?200 ?400 v dd = 12v v ss = 0v v bias = 1v/10v i d , i s (on) ? ? i s (off) ? + i d (off) +? i d , (off) ? + i s (off) +? i d , i s (on) ++ 09005-112 figure 12. leakage currents as a function of temperature, 12 v single supply 0 20406080100 leakage current (na) temperature (c) 800 600 400 0 200 ?400 ?200 ?600 ?1000 ?800 v dd = +5v v ss = 0v v bias = 1v/4.5v i d , i s (on) ? , ? i s (off) ? , + i d (off) +, ? i d , (off) ? , + i s (off) +, ? i d , i s (on) +, + 09005-013 figure 13. leakage currents as a function of temperature, 5 v single supply 0 0.0002 0.0004 0.0006 0.0008 0.0010 0.0012 0.0014 0.0016 0.0018 0.0020 024681012 i dd (a) logic (v) v dd = +12v, v ss = 0v i dd per logic input t a = 25c v dd = +5v, v ss = ?5v v dd = +5v, v ss = 0v v dd = +3v, v ss = 0v 09005-115 figure 14. i dd vs. logic level 0 50 100 150 200 250 300 350 400 450 500 ?5 ?3 ?1 1 3 5 7 9 11 charge injection (pc) v s (v) v dd = +5v v ss = 0v v dd = +5v v ss = ?5v v dd = +12v v ss = 0v v dd = +12v v ss = 0v 09005-012 t a = 25c figure 15. charge injection vs. source voltage
ADG4612/adg4613 rev. 0 | page 13 of 24 0 20 40 60 80 100 120 140 ?40 ?20 0 20 40 60 80 100 time (ns) temperature (c) t off (5v) t on (+5v) t off (+5v) t on (5v) t off (12v) t on (+12v) 09005-017 figure 16. t on /t off times vs. temperature ?120 ?100 ?80 ?60 ?40 ?20 0 off isol a tion (db) frequency (hz) 10k 100k 1m 10m 100m 1g 1k v dd = +5v v ss = ?5v 09005-014 t a = 25c figure 17. off isol ation vs. frequency ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 crosstalk (db) frequency (hz) 10k 100k 1m 10m 100m 1g v dd = +5v v ss = ?5v t a = 25c 09005-015 figure 18. crosstalk vs. frequency 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5k 10k 15k 20k thd + n (%) frequency (hz) v dd = 5v, v ss = 0v, v s = 3.5v p-p v dd = 12v, v ss = 0v, v s = 5v rms v dd = 5v, v ss = 5v, v s = 5v rms load = 110 ? t a = 25c 09005-121 figure 19. thd + n vs. frequency 0 200 400 600 800 1000 1200 1400 1600 1800 2000 ?40 ?20 0 20 40 60 80 100 time (ns) temperature (c) t recovery (+5v) t recovery (+12v) t recovery (5v) t response (5v) t response (+12v) t response (+5v) 09005-122 figure 20. fault response time/fault recovery time ?120 ?100 ?80 ?60 ?40 ?20 0 acpsrr (db) frequency (hz) 100k 1m 10m 10k 1k v dd = +5v v ss = ?5v t a = 25c no decoupling capacitors decoupling capacitors 09005-123 figure 21. acpsrr vs. frequency
ADG4612/adg4613 rev. 0 | page 14 of 24 test circuits i ds v1 v s r on = v1/i ds 09005-020 sx dx figure 22. on resistance v s a a v d i s (off) i d (off) 09005-021 sx dx figure 23. off leakage sx dx a v d i d (on) nc nc = no connect 09005-022 figure 24. on leakage v s inx sx dx gnd r l 300 ? c l 35pf v out v dd v ss 0.1f v dd 0.1f v ss ADG4612 v in v out t on t off 90% 90% 50% 50% 09005-023 figure 25. switching times v s2 in1, in2 s2 d2 v s1 s1 d1 gnd r l 50? c l 35pf v out2 v out1 v dd v ss 0.1f v dd 0.1f v ss v in v out1 v out2 adg4613 t d t d 50% 50% 90% 90% 90% 90% 0v 0v 0v r l 50 ? c l 35pf 09005-024 figure 26. break-before-make time delay, t d
ADG4612/adg4613 rev. 0 | page 15 of 24 inx v out ADG4612 v in v out off ? v out on q inj = c l ? v out sx dx v dd v ss v dd v ss v s r s gnd c l 1nf 09005-025 figure 27. charge injection v out 50 ? network analyzer r l 50? inx v in sx dx 50? off isolation = 20 log v out v s v s v dd v ss 0.1f v dd 0.1f v ss gnd 09005-026 figure 28. off isolation channel-to-channel crosstalk = 20 log v out gnd s1 d s2 v out network analyzer r l 50 ? r 50? v s v s v dd v ss 0.1f v dd 0.1f v ss 09005-027 figure 29. channel-to-channel crosstalk v out 50 ? network analyzer r l 50? inx v in sx dx insertion loss = 20 log v out with switch v out without switch v s v dd v ss 0.1f v dd 0.1f v ss gnd 09005-028 figure 30. bandwidth v out r s audio precision r l 110? inx v in sx dx v s v p-p v dd v ss 0.1f v dd 0.1f v ss gnd 09005-029 figure 31. thd + noise
ADG4612/adg4613 rev. 0 | page 16 of 24 terminology i dd i dd represents the positive supply current. i ss i ss represents the negative supply current. v d , v s v d and v s represent the analog voltage on terminal d and ter mina l s, resp e c t ively. r on r on represents the ohmic resistance between terminal d and ter mina l s. r on r on represents the difference between the r on of any two channels. r flat (on) flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range is represented by r flat (on) . i s (off) i s (off) is the source leakage current with the switch off. i d (off) i d (off) is the drain leakage current with the switch off. i d (on), i s (on) i d (on) and i s (on) represent the channel leakage currents with the switch on. v inl v inl is the maximum input voltage for logic 0. v inh v inh is the minimum input voltage for logic 1. i inl , i inh i inl and i inh represent the low and high input currents of the digital inputs. c d (off) c d (off) represents the off switch drain capacitance, which is measured with reference to ground. c s (off) c s (off) represents the off switch source capacitance, which is measured with reference to ground. c d (on), c s (on) c d (on) and c s (on) represent on switch capacitances, which are measured with reference to ground. c in c in is the digital input capacitance. t on t on represents the delay between applying the digital control input and the output switching on. t off t off represents the delay between applying the digital control input and the output switching off. t d t d represents the off time measured between the 80% point of both switches when switching from one address state to another. fault response time fault response time is the delay between a fault condition (v s > v dd ) on an analog input and the corresponding output below v dd . fault recovery time fault recovery time is, in recovering from a fault condition, the delay between 50% of the input signal to 90% of the output signal. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. off isolation off isolation is a measure of unwanted signal coupling through an off switch. charge injection charge injection is a measure of the glitch impulse transferred from the digital input to the analog output during switching. crosstalk crosstalk is a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. bandwidth bandwidth is the frequency at which the output is attenuated by 3 db. on response on response is the frequency response of the on switch. insertion loss insertion loss is the loss due to the on resistance of the switch. total harmonic distortion + noise (thd + n) the ratio of the harmonic amplitude plus noise of the signal to the fundamental is represented by thd + n. ac power supply rejection ratio (acpsrr) acpsrr is the ratio of the amplitude of signal on the output to the amplitude of the modulation. this is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. the dc voltage on the device is modulated by a sine wave of 0.62 v p-p.
ADG4612/adg4613 rev. 0 | page 17 of 24 theory of operation the ADG4612/adg4613 contain four independent single- pole/single-throw (spst) switches. each switch is rail-to-rail and conducts equally well in both directions when on. the ADG4612/adg4613 has two modes of operation: normal mode and isolation mode. the operation modes are made possible by a special detection circuitry that monitors the voltage levels at the source or drain terminals and v dd relative to ground. depending on these voltage levels, the device operates in normal mode or isolation mode accordingly. isolation mode is a useful feature that isolates the inputs from the outputs where input signals may be present before supplies or during positive fault conditions that can occur in applications. normal mode in normal mode, the switch functions as a normal 4 spst switch, whereby the switch is controlled by the logic input pins, in1 to in4. the following three conditions need to be satisfied for the switch to be in the on condition; ? v dd 2.7 v; and ? input signal, v s , v d < v dd + v t ; and ? logic input, inx set to on level when the switch is in the on condition, if the signal range is from v dd to ?5.5 v, the signals present on the switch inputs are passed through to the switch output. if the analog input exceeds v dd by a threshold voltage, v t , the switch turns off and is in isolation mode. if the analog input signal exceeds the negative supply, v ss , when the switch is off, the switch blocks a signal up to ?5.5 v. if the switch is on, the switch remains on, and this signal is passed to the output. see the negative fault condition; negative signal handling section for more details. isolation mode in isolation mode, all switches are in the off condition. the switch inputs are isolated from the switch outputs. the switch inputs are high impedance inputs with greater than 475 k impedance to v dd ground and across the switch. this prevents any current from flowing that can damage the switch. this is very useful in applications where analog signals may be present at the switch inputs before power is present or where the user has no control over the power supply sequence. the switch is in isolation mode when ? no power supplies are present, that is, when v dd is floating or v dd 1 v; or ? input signal, v s , v d > v dd + v t the negative supply rail, v ss , can be floating or 0 v to ?5.5 v. the ground pin must be connected to the ground potential. table 11. switch operation mode v dd v ss 1 gnd v s , v d (input voltage, s or d) switch condition switch mode floating x 0 v ?5.5 v to +10.5 v all switches off isolation 0 v to 16 v inputs isolated from outputs 0 v to 0.8 v x 0 v ?5.5 v to +10.5 v all switches off isolation 0 v to 16 v inputs isolated from outputs v dd 2.7 v x 0 v v s , v d > v dd + v t all switches off isolation inputs isolated from outputs v dd 2.7 v to 16 v 0 v to ?5.5 v 0 v v dd to v dd C 16 v switch state is determined by logic levels, inx normal 1 x = dont care; for example, floating, 0 v to ?5.5 v.
ADG4612/adg4613 rev. 0 | page 18 of 24 bipolar operation and single-supply operation the ADG4612/adg4613 have a maximum operational range from v dd to v ss of 16 v. the maximum signal range from source to drain, v s to v d , is also 16 v. during operation of the device, the signal range can exceed the power supply rails, but the voltage between the most negative voltage on the device (v s ,v d or v ss ) should be within 16 v of the most positive voltage (v s , v d , inx, or v dd ). these voltage ratings should be adhered to at all times for guaranteed functionality. see table 5 for guaranteed supply ranges. signal ranges and power supply ranges exceeding 16 v may affect the long-term reliability of the device. the ground pin must always be connected to the gnd potential to ensure proper functionality in isolation and normal operation mode. the minimum v dd voltage that the part is guaranteed operational is 2.7 v. the maximum recommended v dd voltage is 16 v. the minimum supply voltage recommended on v ss is ?5.5 v, and the maximum voltage allowable on v ss is 0 v. therefore, given that the v dd to v ss range is 16 v maximum when, v ss = ?5.5 v, the v dd = +10.5 v maximum. positive fault condition if the analog input exceeds v dd by a threshold voltage, v t , then the switch turns off and is in isolation mode. the part can handle a fault of up to 16 v, referenced to the most negative signal. for example, if v dd = 5 v, v ss = 0 v, then the switch protects against an overvoltage of up to 16 v. if v ss = ?5 v and v dd = +5 v, then the switch protects against an overvoltage of up to +11 v. negative fault condition; negative signal handling the ADG4612/adg4613 are not damaged if the analog inputs exceed the negative supply, v ss . if the switch is in the off condition, the switch blocks a signal up to ?5.5 v. if the switch is in the on condition, the switch remains on, and the negative signal is passed to the output; therefore, the ADG4612/adg4613 can pass a negative signal up to ?5.5 v with v ss = 0 v. the user must ensure that the downstream circuitry can handle this signal level. also, the user should ensure the voltage between the most negative voltage on the device (v s ,v d or v ss ) is within 16 v of the most positive voltage (v s , v d , inx, or v dd ).
ADG4612/adg4613 rev. 0 | page 19 of 24 applications information there are many application scenarios that benefit from the functionality offered on the ADG4612/adg4613 switches. the ADG4612/adg4613 offer power-off protection, ensuring the switch is guaranteed off and inputs are high impedance with no power supplies present. this isolation mode is a useful feature that isolates the inputs from the outputs where input signals may be present before supplies. the isolation mode also protects the system against positive fault conditions that can occur in applications, ensuring that the switch turns off and protects downstream circuitry. for example, a module can be connected to a live backplane, supplying signals to the board before supplies are present. this is common in hot swap applications where a card could be hot plugged in a shelf where there are others cards already working and powered on. the ADG4612/adg4613 allow negative signals, down to ?5.5 v to be passed without a negative supply. this can be very useful in applications that need to pass negative signals but do not have a negative supply available. this cannot be done with conventional cmos switches because esd protection diodes turn on and clamp the signals. theses features ensure the system is very robust to power supply sequencing issues that can be present in conventional cmos devices. 09005-030 live backplane hot swap modules controller hot swap modules hot swap modules power supply sw figure 32. typical application signals on inputs with no power present in conventional cmos switches, esd protection diodes can be found on the analog and digital inputs to v dd and gnd or v ss (see figure 33 , for example). if an input voltage is present on the switch inputs with no power supplies applied, current can flow through the esd protection diodes. if this current is not limited to a safe level, it is possible to damage the esd protection diodes and, hence, the switch. input signals may pass through the switch to the output affecting downstream circuitry. the user may also be exceeding the absolute maximum ratings of the devices, and, therefore, affecting the long-term reliability of the device. v s v ss v dd r s r l sx gnd forward current v s > v d forward current flows load current dx 09005-031 figure 33. esd protection diodes on conventional cmos switch some users add external diodes or add current-limiting resistors to protect the device against the conditions shown in figure 33 . however, these solutions all have disadvantages in that they add extra board area, extra component count, and cost. the system level performance can also be affected by the higher on resistance from the current-limiting resistors or the higher leakage from external schottky diodes. using external diodes for protection still creates the problem where a floating v dd line can be pulled up to a diode drop from the input signal. v s v ss v dd r s r l sx gnd dx 09005-032 forward current load current v s > v d forward current flows figure 34. external protection added to protect switch against damage if signals present on inputs without power supplies the ADG4612/adg4613 eliminate the concerns shown in figure 34 . there are no internal esd diodes from the analog or digital inputs to v dd or v ss . if signals are present on the ADG4612/ adg4613 inputs before power is present, the switch is in isolation mode, which means that the inputs have high impedance to v dd , gnd, and the output. this prevents current flow and protects the device from damage.
ADG4612/adg4613 rev. 0 | page 20 of 24 power supply sequencing another benefit of the ADG4612/adg4613 is it eliminates concerns about the power supply sequence. the part can be powered up in any sequence without damage. for devices with conventional cmos switches, it is recommend that power supplies are powered up before analog or digital inputs are present. the ADG4612/adg4613 do not have any power supply sequencing requirements, thereby making them a very robust design. however, a ground must first be present for the device to function in isolation mode and normal mode. v dd supply another area of concern with conventional cmos switches that have analog signals present before the part is powered up is that the v dd supply can be pulled up through the internal esd protection diodes. the v dd supply normally gets pulled up to the input voltage level minus a diode drop, v dd ~v s , v d ? v diode . this voltage can be high enough to power up other chips that are connected to this supply rail in a system, potentially damaging other components in that system. the ADG4612/adg4613 architecture ensures that the v dd supply is isolated from the analog inputs, thereby preventing the supplies from being pulled to a higher potential when a signal is present on the inputs without any power having been applied.
ADG4612/adg4613 rev. 0 | page 21 of 24 outline dimensions 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 35. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters 3.10 3.00 sq 2.90 0.30 0.23 0.18 1.75 1.60 sq 1.45 01-13-2010-d 1 0.50 bsc bottom view top view 16 5 8 9 12 13 4 exposed pad p i n 1 i n d i c a t o r 0.50 0.40 0.30 seating plane 0.05 max 0.02 nom 0.20 ref 0.20 min coplanarity 0.08 pin 1 indicator forproperconnectionof the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 0.80 0.75 0.70 compliant to jedec standards mo-220-weed-6. figure 36. 16-lead lead frame chip scale package [lfcsp_wq] 3 mm 3 mm body, very thin quad (cp-16-22) dimensions shown in millimeters
ADG4612/adg4613 rev. 0 | page 22 of 24 ordering guide model 1 temperature range package description package option branding ADG4612bruz ?40c to +105c thin shrink small outline package [tssop] ru-16 ADG4612bruz-reel7 ?40c to +105c thin shri nk small outline package [tssop] ru-16 ADG4612bcpz-reel7 ?40c to +105c lead frame chip scale package [lfcsp_wq] cp-16-22 lg5 eval-ADG4612ebz evaluation board adg4613bruz ?40c to +105c thin shrink small outline package [tssop] ru-16 adg4613bruz-reel7 ?40c to +105c thin shri nk small outline package [tssop] ru-16 adg4613bcpz-reel7 ?40c to +105c lead frame chip scale package [lfcsp_wq] cp-16-22 s3y 1 z = rohs compliant part.
ADG4612/adg4613 rev. 0 | page 23 of 24 notes
ADG4612/adg4613 rev. 0 | page 24 of 24 notes ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d09005-0-10/10(0)

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